verilog - Synchronous Counter using JK flip-flop not behaves as expected - Stack Overflow
How to design a synchronous counter 4 bit using JK flip flop that can count up even numbers from 0 to 14, and count down odd numbers from 15 to 0 in 1 system - Quora
Synchronous counter
logisim - 4-Bit ripple down counter using negative edge-triggered J-K flip flops - Electrical Engineering Stack Exchange
Proposed 4-bit Asynchronous Down Counter this control signal is 1 then... | Download Scientific Diagram